A conventional solution to noise degradation is to use a differential mode of signaling. In differential signaling, a single data signal is transmitted over two wires (e.g. first and second signal lines), each of which carries one signal component. The two components are generally derived from the same source data signal and are varied such that the data signal is transmitted as the difference between the two signal components. Differential mode signaling improves noise immunity to common mode noise (i.e. noise that occurs on both the first and second signal lines).
In digital environments, differential data signals can be transmitted using two voltage levels of opposite polarity relative to a reference level. For instance, a digital logic level of “high” can be represented by transmitting a positive voltage level, relative to the reference level, on a first signal line and by transmitting a negative voltage level of opposite polarity on a second signal line. While a digital logic level of “low” can be represented by transmitting the reference level on both the first and the second signal lines. The transmitter can then extract the digital data by subtracting the voltage on the second signal line from the voltage on the first signal line. After subtracting the voltages, a received voltage of approximately twice the positive voltage level is registered as a digital logic level high, and a received voltage approximately equal to zero is registered as a digital logic level low. Common mode noise is removed during the subtraction process.
Alternatively, current signaling may be used, in which a differential signal is represented as two current signals flowing in opposite directions on a closed loop. The direction of current flow indicates the polarity of the digital signal transmitted. By changing the relative polarity of the voltage signal components direction of current flow, the desired data may be transmitted.
To provide high voltage isolation and to improve noise immunity to common mode signals, it is known to employ differential signaling with capacitive coupling. Under known differential capacitive coupling techniques, a capacitor is inserted into each of the differential data signal lines, such that the differential transmitter and the differential receiver are separated by a capacitor. The capacitive coupling provides high voltage isolation between the differential transmitter and the differential receiver.
Capacitive coupling, however, has limited success in rejecting high voltage (e.g. 20 volts peak-to-peak) common mode signals. Capacitors capable of withstanding high voltage common mode signals, such as a 0.01 micro-Farad, 3 kilo-volt rated capacitor, are both expensive and bulky. Furthermore, known capacitive coupling techniques are unable to reject high voltage signals over a broad frequency range. Any common mode noise signals over this broad frequency range which are not attenuated will push the transmitted signals into ground or into the chip voltage rail, thereby corrupting the transmitted data.
Accordingly, there exists a need for an improved electrical interface for attenuating common mode signals across a differential signal path.